In recent years, increase of a capacity is demanded for a data storage non-volatile memory that is represented by a resistance change memory such as a resistance random access memory (ReRAM) and phase-change random access memory (PRAM) (registered trademark). In the existing resistance change memory using an access transistor, however, floor area per unit cell is large. Therefore, the increase of the capacity is not easy even when miniaturization is performed under the same design rule, as compared with, for example, an NAND flash memory. In contrast, in a case where a so-called cross point array structure in which a memory device is disposed at a cross point (cross point) of intersecting wirings is used, the floor area per unit cell is decreased, which makes it possible to realize the increase of the capacity.
A selecting device (a switch device) for cell selection is provided in addition to the memory device in the cross point memory cell. Examples of the switch device include a switch device (for example, see NPTLs 1 and 2) that is configured using, for example, a PN diode, an avalanche diode, or a metal oxide, and a switch device (for example, see NPTLs 3 and 4) that is switched at a predetermined threshold voltage by Mott transition to drastically increase the current.
Examples of the switch device include a switch device (an ovonic threshold switch (OTS) device) using a chalcogenide material. The OTS device is disclosed in, for example, PTLs 1 and 2. The OTS device has characteristics in which a current is drastically increased at a switching threshold voltage or higher, which makes it possible to provide a relatively large current density in a selected (ON) state. In addition, a layer made of a chalcogenide material (an OTS layer) has an amorphous microstructure. This allows for formation of the OTS layer under a condition of room temperature of, for example, a physical vapor deposition (PVD) method or a chemical vapor deposition (CVD) method. Accordingly, the OTS device has an advantage of high process affinity with a manufacturing process of the memory device.